This is a super computer on a chip. This is not SIMD, this is not SOC or an upgrade to core-duo x40. This is a change to the design of a single processor to one that is intended to include multiple cores where the software is expecting multiple cores.

C|Net has focused on the memory per core as the big issue. They are right to be impressed by it, but they fail to see the big picture as to why this memory is there. Each core is expected to perform dozens, hundreds or thousands of operations on that set of data. Some of these operations may be to make that data available to instructions being performed by another core. Splitting the data is part of the design change and software will need to know where it sends data in a multi-core chip and where it's instructions are being run to optimize data access.

Some people complain that 20GB of RAM might not be enough. They say that the system will allow more RAM because that makes sense. No it won't! You will not want to pool all of your system RAM into one place accessed by any of these 80 cores. It is a performance hit to multi-core systems to share that RAM. Some of this will be seen with one CPU performing an operation on data held by RAM attached to another CPU. In this case only two CPUs are held up instead of all 80. Loading data from outside the CPU to have a core perform operations on will slow this system down in the same way that a page file hit slows a current Windows system. It's the difference in 2 vs. 80 operations.

Software that runs on Tera-Scale processors would know how to split tasks and memory between cores. The Operating System will need to understand to give a set of cores to an application so it has enough RAM and processing power to get it's jobs done. You could see 20 cores doing the same operation on sets of data (SIMD). Then at the same time 10 cores doing a different set of instructions on a shared set of data. Each core can reach the RAM on another core, so those 10 would be able to read, write, and perform an operation on that RAM.

This chip combines some SIMD concepts along with parallel computing concepts and the new multi-core concepts. Intel discovered you really need a lot of RAM per core so each core can handle a lot of data by itself and the entire RAM needs of the applications will be met within the CPU. 20GB is what they show in a sample using SRAM. They will be switching to DRAM and with that switch may also increase the RAM per core. The key to RAM per Core is going to depend on some efficiencies in the CPU based on tasks and data. Intel will begin to discover their performance curve with this prototype.

This system is nothing near what you will see on your desk in 5 years. It will be used to pave the way for application development and system design for years to come. It is the most important stepping stone for the future of computing that we've seen in the last several years because it changes how the hardware and software are designed to work together.